Physical-aware pattern selection for stuck-at faults

The stuck-at faults are basic faults that fail the chips. Various defects in the circuit can develop into stuck-at faults. To detect more defects caused by stuck-at faults, some of the fault sites may need to be detected multiple times. Thus, the existing pattern generation techniques provide N-detect ATPG, where each fault site would not be removed from the fault list before it is detected for N times. The "N" value is determined empirically by the criticality of the application. The N-detect test has been shown to have a higher quality of detecting defects. However, the traditional N-detect test does not necessarily exploit the localized characteristics of defects. In addition, it may result in a large number of patterns. In this paper, we present a test pattern selection procedure to optimize the N-detect pattern generation by differentiating the fault sites according to the physical details and generate patterns that have comparable defect detection quality with N-detect pattern generation. © 2017 IEEE.

• Fecha de publicación: 2017
• Institución: Universidad Tecnológica de Bolívar
• Repositorio: Repositorio Institucional UTB
• Idioma: eng
• OAI Identifier: oai:repositorio.utb.edu.co:20.500.12585/8935
• Acceso en línea: https://hdl.handle.net/20.500.12585/8935
• Palabra clave: Defects; Testing; Basic faults; Characteristics of defect; Defect detection; Detecting defects; Pattern Generation; Pattern selection; Stuck-at faults; Test pattern selections; Fault detection
• Rights: restrictedAccess
• License: http://creativecommons.org/licenses/by-nc-nd/4.0/