Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits

This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpo...

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Autores:
Simancas, José G.
Ortiz, José C.
Tipo de recurso:
Article of journal
Fecha de publicación:
2014
Institución:
Universidad Antonio Nariño
Repositorio:
Repositorio UAN
Idioma:
spa
OAI Identifier:
oai:repositorio.uan.edu.co:123456789/3947
Acceso en línea:
http://revistas.uan.edu.co/index.php/ingeuan/article/view/383
http://repositorio.uan.edu.co/handle/123456789/3947
Palabra clave:
Σ-Δ modulator
PDM signals
computational model
low pass filter
verification of analog integrated circuits
Modulador ∑-∆
señales PDM
modelo computacional
filtro pasa-bajas
verificación de circuitos integrados analógicos
Rights
openAccess
License
Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)