Enforcing full-stack memory-safety in cyber-physical systems

Memory-safety attacks are one of the most critical threats against Cyber-Physical Systems (CPS). As opposed to mainstream systems, CPS often impose stringent timing constraints. Given such timing constraints, how can we protect CPS from memory-safety attacks? In this paper, we propose a full-stack m...

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Autores:
Tipo de recurso:
Fecha de publicación:
2018
Institución:
Universidad del Rosario
Repositorio:
Repositorio EdocUR - U. Rosario
Idioma:
eng
OAI Identifier:
oai:repository.urosario.edu.co:10336/22524
Acceso en línea:
https://doi.org/10.1007/978-3-319-94496-8_2
https://repository.urosario.edu.co/handle/10336/22524
Palabra clave:
Computation theory
Cyber Physical System
Embedded systems
Logic programming
Real time systems
Water treatment
Attack detection
Computational logic
Cyber-Physical System (CPS)
Execution time
Memory safety
Real time constraints
Stack memory
Timing constraints
Safety engineering
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License
http://purl.org/coar/access_right/c_abf2