IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION
The implementation of the square root computation in an FPGA device is presented in this work. The calculation is not one of convergence type, so the accuracy is very high and there are no conditions or restrictions for the operation to be fulfilled. It also consumes much less hardware surface than...
- Autores:
-
López, Jorge H.
Restrepo, Johans
Tobón, Jorge E.
- Tipo de recurso:
- Article of journal
- Fecha de publicación:
- 2018
- Institución:
- Universidad Nacional de Colombia
- Repositorio:
- Universidad Nacional de Colombia
- Idioma:
- spa
- OAI Identifier:
- oai:repositorio.unal.edu.co:unal/67295
- Acceso en línea:
- https://repositorio.unal.edu.co/handle/unal/67295
http://bdigital.unal.edu.co/68324/
- Palabra clave:
- 53 Física / Physics
5 Ciencias naturales y matemáticas / Science
VHDL
FPGA
Operación
Raíz Cuadrada
VLSI
VHDL
FPGA
Operation
Square root
VLSI
- Rights
- openAccess
- License
- Atribución-NoComercial 4.0 Internacional
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Universidad Nacional de Colombia |
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Atribución-NoComercial 4.0 InternacionalDerechos reservados - Universidad Nacional de Colombiahttp://creativecommons.org/licenses/by-nc/4.0/info:eu-repo/semantics/openAccesshttp://purl.org/coar/access_right/c_abf2López, Jorge H.7bc81b26-978c-4246-b1d0-218b284875ad300Restrepo, Johans77b8277f-c0a2-464d-8e51-c34e2c2136cc300Tobón, Jorge E.1c0bc089-66b3-48d5-a464-b65416ce62923002019-07-03T03:56:43Z2019-07-03T03:56:43Z2018-07-01ISSN: 2500-8013https://repositorio.unal.edu.co/handle/unal/67295http://bdigital.unal.edu.co/68324/The implementation of the square root computation in an FPGA device is presented in this work. The calculation is not one of convergence type, so the accuracy is very high and there are no conditions or restrictions for the operation to be fulfilled. It also consumes much less hardware surface than other algorithms for calculating the square root of a number. The number entered is of fixed-point representation, it is parameterizable, that is, two constants N and M can define the size of the number, where N defines the number of bits in the integer part of the number and M defines the number of bits of the fractional part.En este trabajo se presenta la implementación de la raíz cuadrada de un número en un dispositivo FPGA. El algoritmo usado no es un algoritmo de convergencia, por tanto, la exactitud del cálculo es muy alta, además no existen restricciones de ningún tipo para que la operación sea llevada a cabo. El uso de hardware en la FPGA es mucho menor que el usado por otros algoritmos que también calculan la raíz cuadrada de un número. Para representar el número se usa la representación de punto fijo, para ello se usan dos parámetros, N y M, donde N define el número de bits que representan la parte entera y M define el número de bits de la parte fraccional. M y N son definidos en la síntesis del módulo.application/pdfspaUniversidad Nacional de Colombia - Sede Bogotá - Facultad de Ciencias - Departamento de Físicahttps://revistas.unal.edu.co/index.php/momento/article/view/70377Universidad Nacional de Colombia Revistas electrónicas UN MOMENTO - Revista de FísicaMOMENTO - Revista de FísicaLópez, Jorge H. and Restrepo, Johans and Tobón, Jorge E. (2018) IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION. MOMENTO (57). pp. 41-49. ISSN 2500-801353 Física / Physics5 Ciencias naturales y matemáticas / ScienceVHDLFPGAOperaciónRaíz CuadradaVLSIVHDLFPGAOperationSquare rootVLSIIMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATIONArtículo de revistainfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionhttp://purl.org/coar/resource_type/c_6501http://purl.org/coar/resource_type/c_2df8fbb1http://purl.org/coar/version/c_970fb48d4fbd8a85Texthttp://purl.org/redcol/resource_type/ARTORIGINAL70377-389613-1-PB.pdfapplication/pdf259711https://repositorio.unal.edu.co/bitstream/unal/67295/1/70377-389613-1-PB.pdf04fe83dda0db40e389f131ca48e61b68MD51THUMBNAIL70377-389613-1-PB.pdf.jpg70377-389613-1-PB.pdf.jpgGenerated Thumbnailimage/jpeg6714https://repositorio.unal.edu.co/bitstream/unal/67295/2/70377-389613-1-PB.pdf.jpgd3f43a52dd71724a46ee2dcc47b51911MD52unal/67295oai:repositorio.unal.edu.co:unal/672952023-05-29 23:02:53.59Repositorio Institucional Universidad Nacional de Colombiarepositorio_nal@unal.edu.co |
dc.title.spa.fl_str_mv |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
title |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
spellingShingle |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION 53 Física / Physics 5 Ciencias naturales y matemáticas / Science VHDL FPGA Operación Raíz Cuadrada VLSI VHDL FPGA Operation Square root VLSI |
title_short |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
title_full |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
title_fullStr |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
title_full_unstemmed |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
title_sort |
IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION |
dc.creator.fl_str_mv |
López, Jorge H. Restrepo, Johans Tobón, Jorge E. |
dc.contributor.author.spa.fl_str_mv |
López, Jorge H. Restrepo, Johans Tobón, Jorge E. |
dc.subject.ddc.spa.fl_str_mv |
53 Física / Physics 5 Ciencias naturales y matemáticas / Science |
topic |
53 Física / Physics 5 Ciencias naturales y matemáticas / Science VHDL FPGA Operación Raíz Cuadrada VLSI VHDL FPGA Operation Square root VLSI |
dc.subject.proposal.spa.fl_str_mv |
VHDL FPGA Operación Raíz Cuadrada VLSI VHDL FPGA Operation Square root VLSI |
description |
The implementation of the square root computation in an FPGA device is presented in this work. The calculation is not one of convergence type, so the accuracy is very high and there are no conditions or restrictions for the operation to be fulfilled. It also consumes much less hardware surface than other algorithms for calculating the square root of a number. The number entered is of fixed-point representation, it is parameterizable, that is, two constants N and M can define the size of the number, where N defines the number of bits in the integer part of the number and M defines the number of bits of the fractional part. |
publishDate |
2018 |
dc.date.issued.spa.fl_str_mv |
2018-07-01 |
dc.date.accessioned.spa.fl_str_mv |
2019-07-03T03:56:43Z |
dc.date.available.spa.fl_str_mv |
2019-07-03T03:56:43Z |
dc.type.spa.fl_str_mv |
Artículo de revista |
dc.type.coar.fl_str_mv |
http://purl.org/coar/resource_type/c_2df8fbb1 |
dc.type.driver.spa.fl_str_mv |
info:eu-repo/semantics/article |
dc.type.version.spa.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.coar.spa.fl_str_mv |
http://purl.org/coar/resource_type/c_6501 |
dc.type.coarversion.spa.fl_str_mv |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
dc.type.content.spa.fl_str_mv |
Text |
dc.type.redcol.spa.fl_str_mv |
http://purl.org/redcol/resource_type/ART |
format |
http://purl.org/coar/resource_type/c_6501 |
status_str |
publishedVersion |
dc.identifier.issn.spa.fl_str_mv |
ISSN: 2500-8013 |
dc.identifier.uri.none.fl_str_mv |
https://repositorio.unal.edu.co/handle/unal/67295 |
dc.identifier.eprints.spa.fl_str_mv |
http://bdigital.unal.edu.co/68324/ |
identifier_str_mv |
ISSN: 2500-8013 |
url |
https://repositorio.unal.edu.co/handle/unal/67295 http://bdigital.unal.edu.co/68324/ |
dc.language.iso.spa.fl_str_mv |
spa |
language |
spa |
dc.relation.spa.fl_str_mv |
https://revistas.unal.edu.co/index.php/momento/article/view/70377 |
dc.relation.ispartof.spa.fl_str_mv |
Universidad Nacional de Colombia Revistas electrónicas UN MOMENTO - Revista de Física MOMENTO - Revista de Física |
dc.relation.references.spa.fl_str_mv |
López, Jorge H. and Restrepo, Johans and Tobón, Jorge E. (2018) IMPLEMENTATION OF AN ALGORITHM FOR SQUARE ROOT COMPUTATION IN AN FPGA ARRAY BY USING FIXED POINT REPRESENTATION. MOMENTO (57). pp. 41-49. ISSN 2500-8013 |
dc.rights.spa.fl_str_mv |
Derechos reservados - Universidad Nacional de Colombia |
dc.rights.coar.fl_str_mv |
http://purl.org/coar/access_right/c_abf2 |
dc.rights.license.spa.fl_str_mv |
Atribución-NoComercial 4.0 Internacional |
dc.rights.uri.spa.fl_str_mv |
http://creativecommons.org/licenses/by-nc/4.0/ |
dc.rights.accessrights.spa.fl_str_mv |
info:eu-repo/semantics/openAccess |
rights_invalid_str_mv |
Atribución-NoComercial 4.0 Internacional Derechos reservados - Universidad Nacional de Colombia http://creativecommons.org/licenses/by-nc/4.0/ http://purl.org/coar/access_right/c_abf2 |
eu_rights_str_mv |
openAccess |
dc.format.mimetype.spa.fl_str_mv |
application/pdf |
dc.publisher.spa.fl_str_mv |
Universidad Nacional de Colombia - Sede Bogotá - Facultad de Ciencias - Departamento de Física |
institution |
Universidad Nacional de Colombia |
bitstream.url.fl_str_mv |
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