Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes
Ilustraciones
- Autores:
-
Hernández Ortiz, César Augusto
- Tipo de recurso:
- Fecha de publicación:
- 2022
- Institución:
- Universidad Nacional de Colombia
- Repositorio:
- Universidad Nacional de Colombia
- Idioma:
- spa
- OAI Identifier:
- oai:repositorio.unal.edu.co:unal/81623
- Palabra clave:
- 620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingeniería
IEC 61850
Red de bus
Procesamiento de señales - Técnicas digitales
EC61850
Bus de proceso
IEDs
Merging Unit
ABB REX640
RTS
Bus process
Merging Unit
- Rights
- openAccess
- License
- Reconocimiento 4.0 Internacional
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Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| dc.title.translated.eng.fl_str_mv |
Methodology to evaluate the loss/delay of information on IED |
| title |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
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Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes 620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingeniería IEC 61850 Red de bus Procesamiento de señales - Técnicas digitales EC61850 Bus de proceso IEDs Merging Unit ABB REX640 RTS Bus process Merging Unit |
| title_short |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| title_full |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| title_fullStr |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| title_full_unstemmed |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| title_sort |
Metodología para evaluar la pérdida/retraso de información en dispositivos inteligentes |
| dc.creator.fl_str_mv |
Hernández Ortiz, César Augusto |
| dc.contributor.advisor.none.fl_str_mv |
Pérez Gonzalez, Ernesto |
| dc.contributor.author.none.fl_str_mv |
Hernández Ortiz, César Augusto |
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Programa de Investigacion sobre Adquisicion y Analisis de Señales Paas-Un |
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620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingeniería |
| topic |
620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingeniería IEC 61850 Red de bus Procesamiento de señales - Técnicas digitales EC61850 Bus de proceso IEDs Merging Unit ABB REX640 RTS Bus process Merging Unit |
| dc.subject.other.none.fl_str_mv |
IEC 61850 Red de bus |
| dc.subject.lemb.none.fl_str_mv |
Procesamiento de señales - Técnicas digitales |
| dc.subject.proposal.spa.fl_str_mv |
EC61850 Bus de proceso IEDs Merging Unit ABB REX640 RTS |
| dc.subject.proposal.eng.fl_str_mv |
Bus process Merging Unit |
| description |
Ilustraciones |
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2022 |
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2022-06-21T21:25:33Z |
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2022-06-21T21:25:33Z |
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2022 |
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Trabajo de grado - Maestría |
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Universidad Nacional de Colombia |
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Repositorio Institucional Universidad Nacional de Colombia |
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IEC International Electrotechnical Commision, “IEC 61850-8-1, Communication networks and systems for power utility automation - Part 8-1: Specific communication service mapping (SCSM) - Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3,” 2011. IEC International Electrotechnical Commission, “IEC Standard for Communication Network and Systems in Substations part-9-2: Specific Communication Service Mapping (SCSM)-)-Sampled Values over ISO/IEC 8802-3, IEC 61850-9- 2, 1st ed.,” 2004. A. Abdolkhalig and R. Zivanovic, “Simulation and testing of the over-current protection system based on IEC 61850 Process-Buses and dynamic estimator,” Sustainable Energy, Grids and Networks, vol. 2, pp. 41–50, 2015, doi: 10.1016/j.segan.2015.04.001. X. Chen, H. Guo, and P. Crossley, “Interoperability Performance Assessment of Multivendor IEC61850 Process Bus,” IEEE Transactions on Power Delivery, vol. 31, no. 4, pp. 1934–1944, 2016, doi: 10.1109/TPWRD.2015.2509644. L. Yang, P. A. Crossley, A. Wen, R. Chatfield, and J. Wright, “Design and performance testing of a multivendor IEC61850-9-2 process bus based protection scheme,” IEEE Transactions on Smart Grid, vol. 5, no. 3, pp. 1159–1164, 2014, doi: 10.1109/TSG.2013.2277940. “PERFORMANCE EVALUATION OF PROTECTION FUNCTIONS FOr IEC 61850-9-2 PROCESS BUS USING REAL-TIME HARDWARE-IN-THE-loop simulation approach,” 2013. E. Demeter, T. S. Sidhu, and S. O. Faried, “An Open-System Approach to Power System Protection and Control Integration,” IEEE Transactions on Power Delivery, vol. 21, no. 1, pp. 30–37, 2006, doi: 10.1109/TPWRD.2005.855628. M. G. Kanabar and T. S. Sidhu, “Performance of IEC 61850-9-2 process bus and corrective measure for digital relaying,” IEEE Transactions on Power Delivery, vol. 26, no. 2, pp. 725–735, 2011, doi: 10.1109/TPWRD.2009.2038702. “OPNET Technologies - Simulador de redes | Riverbed.” https://www.riverbed.com/mx/products/steelcentral/opnet.html?redirect=opnet (accessed Apr. 07, 2020). V. H. Nguyen et al., “Real-Time Simulation and Hardware-in-the-Loop Approaches for Integrating Renewable Energy Sources into Smart Grids: Challenges & Actions,” 2017. E. Perez and J. De La Ree, “Development of a real time simulator based on ATP-EMTP and sampled values of IEC61850-9-2,” International Journal of Electrical Power and Energy Systems, vol. 83, pp. 594–600, 2016, doi: 10.1016/j.ijepes.2016.06.001. W. Foundation, “Wireshark · Go deep.,” Wireshark Foundation, 2016. https://www.wireshark.org/ IEC, “IEC 61850 Part 9-1: Specific Communication Service Mapping (SCSM) – Sampled values over serial unidirectional multidrop point to point link Reference,” Iec, vol. 2003. IEC, Switzerland, Europe, 2003. M. G. Kanabar, T. S. Sidhu, and M. R. D. Zadeh, “Laboratory investigation of IEC 61850-9-2-based busbar and distance relaying with corrective measure for sampled value loss/delay,” IEEE Transactions on Power Delivery, vol. 26, no. 4, pp. 2587–2595, 2011, doi: 10.1109/TPWRD.2011.2159033. M. Kanabar, S. Tarlochan, and S. Sidhu, “Investigating Performance and Reliability of Process Bus Networks for Digital Protective Relaying,” no. September, 2011. C. Brunner, Lang Gerhard, L. Frederic, and S. Fred, “Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2,” UCA International Users Group, vol. 1, no. Figure 4, p. 31, 2004. M. D. Omar Faruque et al., “Real-Time Simulation Technologies for Power Systems Design, Testing, and Analysis,” IEEE Power and Energy Technology Systems Journal, vol. 2, no. 2, pp. 63–73, Aug. 2015, doi: 10.1109/jpets.2015.2427370. M. Steurer, F. Bogdan, W. Ren, M. Sloderbeck, and S. Woodruff, “Controller and power hardware-in-loop methods for accelerating renewable energy integration,” 2007. doi: 10.1109/PES.2007.386022. M. S. Almas, R. Leelaruji, and L. Vanfretti, “Over-current relay model implementation for real time simulation & Hardware-in-the-Loop (HIL) validation,” in IECON Proceedings (Industrial Electronics Conference), 2012, pp. 4789–4796. doi: 10.1109/IECON.2012.6389585. E. Perez and J. de la Ree, “Development of a real time simulator based on ATP-EMTP and sampled values of IEC61850-9-2,” International Journal of Electrical Power and Energy Systems, vol. 83, pp. 594–600, 2016, doi: 10.1016/j.ijepes.2016.06.001. H. Kirrmann, K. Weber, O. Kleineberg, and H. Weibel, “HSR: Zero recovery time and low-cost redundancy for industrial Ethernet (high availability seamless redundancy, IEC 62439-3),” ETFA 2009 - 2009 IEEE Conference on Emerging Technologies and Factory Automation, pp. 3–6, 2009, doi: 10.1109/ETFA.2009.5347037. G. Yang, S. Hao, S. Yao, and T. Zhang, “Study on SV packet transmission delay measurement of IEC 61850-9-2 process bus networks in smart substation,” in 2017 16th International Conference on Optical Communications and Networks (ICOCN), Aug. 2017, pp. 1–3. doi: 10.1109/ICOCN.2017.8121371. |
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Departamento de Ingeniería Eléctrica y Automática |
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Facultad de Minas |
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Reconocimiento 4.0 Internacionalhttp://creativecommons.org/licenses/by/4.0/info:eu-repo/semantics/openAccesshttp://purl.org/coar/access_right/c_abf2Pérez Gonzalez, Ernesto11588e2330c6ad59263f94bd4582b6a1Hernández Ortiz, César Augustoed783ee1d08aa43957578f8c497e8dfePrograma de Investigacion sobre Adquisicion y Analisis de Señales Paas-Un2022-06-21T21:25:33Z2022-06-21T21:25:33Z2022https://repositorio.unal.edu.co/handle/unal/81623Universidad Nacional de ColombiaRepositorio Institucional Universidad Nacional de Colombiahttps://repositorio.unal.edu.co/IlustracionesLa transición e implementación de subestaciones digitales de acuerdo con el estándar IEC61850 tiene cambios en la metodología de pruebas y la puesta en servicio de estas subestaciones. El desarrollo del Bus de proceso (IEC51850-9-2) en las subestaciones digitales ha permitido la transmisión y el manejo de las señales secundarias de corriente y tensión como señales digitales muestreadas y sincronizados en el tiempo, este intercambio de información puede ocasionar una pérdida de sincronismo entre los IEDs del Bus de proceso, y las consecuencias durante su operación debe ser conocida antes de su entrada en operación. El muestreo en tiempo real de corrientes y tensiones publicadas con estampa de tiempo en el bus de proceso puede generar congestiones que impliquen una pérdida/retraso de SV afectando el funcionamiento del IED. La metodología propuesta en este trabajo permite estudiar la respuesta individual de un IED conectado al bus de proceso para diferentes contingencias de SV. Para estudiar su respuesta, se utiliza un algoritmo desarrollado en MODELS, el cual realiza un muestreo sincronizado de las corrientes y tensiones calculadas por el ATP y mediante la técnica “Hardware in The Loop –HIL-” emula el comportamiento de una “Merging Unit” virtual publicando SV directamente en el IED de acuerdo con protocolo IEC61850-9-2. Las simulaciones realizadas en ATP permiten evaluar la respuesta de una función de sobrecorriente de fases, cada caso de estudio considera una pérdida sistémica de SV; la operación, señalización y las omisiones de disparo del IED se registran en cada secuencia específica de pérdida / retardo de SV en el bus de proceso. (Texto tomado de la fuente)The transition and implementation of digital substations according to IEC61850 standard has changes in the testing methodology and the commissioning of these substations. The development of the Process Bus (IEC51850-9-2) in digital substations has allowed the transmission of secondary signals of voltage and current as sampled digital signals synchronized in time, this exchange of information can cause a loss of synchronism between IEDs in the process bus and the consequences during their operation must be known before they start operating. The real-time sampling of published currents and voltages with a time stamp in the process bus can also generate congestion that implies a loss / delay of SV that affects the performance of the IED. The methodology proposed in this work allows to study the individual response of an IED connected to the process bus for different SV contingencies. To study its response, an algorithm developed in MODELS is used, which performs a synchronized sampling of the currents and voltages calculated by the ATP and by means of “Hardware in The Loop – HIL-” technique, it emulates the behavior of a virtual Merging Unit publishing SV directly to the IED according to the IEC61850-9-2 protocol. Simulations carried out in ATP allow to evaluate the response of a phase overcurrent function, every study case consider a systemic loss of SV; the operation, signaling and trip omissions of the IED are recorded in each specific sequence of loss / delay of SV on the process bus.MaestríaMagíster en Ingeniería - Ingeniería EléctricaAutomatización de subestaciones eléctricasÁrea Curricular de Ingeniería Eléctrica e Ingeniería de Control93 páginasapplication/pdfspaUniversidad Nacional de ColombiaMedellín - Minas - Maestría en Ingeniería - Ingeniería EléctricaDepartamento de Ingeniería Eléctrica y AutomáticaFacultad de MinasMedellínUniversidad Nacional de Colombia - Sede Medellín620 - Ingeniería y operaciones afines::629 - Otras ramas de la ingenieríaIEC 61850Red de busProcesamiento de señales - Técnicas digitalesEC61850Bus de procesoIEDsMerging UnitABB REX640RTSBus processMerging UnitMetodología para evaluar la pérdida/retraso de información en dispositivos inteligentesMethodology to evaluate the loss/delay of information on IEDTrabajo de grado - Maestríainfo:eu-repo/semantics/masterThesisinfo:eu-repo/semantics/acceptedVersionTexthttp://purl.org/redcol/resource_type/TMIEC International Electrotechnical Commision, “IEC 61850-8-1, Communication networks and systems for power utility automation - Part 8-1: Specific communication service mapping (SCSM) - Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3,” 2011.IEC International Electrotechnical Commission, “IEC Standard for Communication Network and Systems in Substations part-9-2: Specific Communication Service Mapping (SCSM)-)-Sampled Values over ISO/IEC 8802-3, IEC 61850-9- 2, 1st ed.,” 2004.A. Abdolkhalig and R. Zivanovic, “Simulation and testing of the over-current protection system based on IEC 61850 Process-Buses and dynamic estimator,” Sustainable Energy, Grids and Networks, vol. 2, pp. 41–50, 2015, doi: 10.1016/j.segan.2015.04.001.X. Chen, H. Guo, and P. Crossley, “Interoperability Performance Assessment of Multivendor IEC61850 Process Bus,” IEEE Transactions on Power Delivery, vol. 31, no. 4, pp. 1934–1944, 2016, doi: 10.1109/TPWRD.2015.2509644.L. Yang, P. A. Crossley, A. Wen, R. Chatfield, and J. Wright, “Design and performance testing of a multivendor IEC61850-9-2 process bus based protection scheme,” IEEE Transactions on Smart Grid, vol. 5, no. 3, pp. 1159–1164, 2014, doi: 10.1109/TSG.2013.2277940.“PERFORMANCE EVALUATION OF PROTECTION FUNCTIONS FOr IEC 61850-9-2 PROCESS BUS USING REAL-TIME HARDWARE-IN-THE-loop simulation approach,” 2013.E. Demeter, T. S. Sidhu, and S. O. Faried, “An Open-System Approach to Power System Protection and Control Integration,” IEEE Transactions on Power Delivery, vol. 21, no. 1, pp. 30–37, 2006, doi: 10.1109/TPWRD.2005.855628.M. G. Kanabar and T. S. Sidhu, “Performance of IEC 61850-9-2 process bus and corrective measure for digital relaying,” IEEE Transactions on Power Delivery, vol. 26, no. 2, pp. 725–735, 2011, doi: 10.1109/TPWRD.2009.2038702.“OPNET Technologies - Simulador de redes | Riverbed.” https://www.riverbed.com/mx/products/steelcentral/opnet.html?redirect=opnet (accessed Apr. 07, 2020).V. H. Nguyen et al., “Real-Time Simulation and Hardware-in-the-Loop Approaches for Integrating Renewable Energy Sources into Smart Grids: Challenges & Actions,” 2017.E. Perez and J. De La Ree, “Development of a real time simulator based on ATP-EMTP and sampled values of IEC61850-9-2,” International Journal of Electrical Power and Energy Systems, vol. 83, pp. 594–600, 2016, doi: 10.1016/j.ijepes.2016.06.001.W. Foundation, “Wireshark · Go deep.,” Wireshark Foundation, 2016. https://www.wireshark.org/IEC, “IEC 61850 Part 9-1: Specific Communication Service Mapping (SCSM) – Sampled values over serial unidirectional multidrop point to point link Reference,” Iec, vol. 2003. IEC, Switzerland, Europe, 2003.M. G. Kanabar, T. S. Sidhu, and M. R. D. Zadeh, “Laboratory investigation of IEC 61850-9-2-based busbar and distance relaying with corrective measure for sampled value loss/delay,” IEEE Transactions on Power Delivery, vol. 26, no. 4, pp. 2587–2595, 2011, doi: 10.1109/TPWRD.2011.2159033.M. Kanabar, S. Tarlochan, and S. Sidhu, “Investigating Performance and Reliability of Process Bus Networks for Digital Protective Relaying,” no. September, 2011.C. Brunner, Lang Gerhard, L. Frederic, and S. Fred, “Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2,” UCA International Users Group, vol. 1, no. Figure 4, p. 31, 2004.M. D. Omar Faruque et al., “Real-Time Simulation Technologies for Power Systems Design, Testing, and Analysis,” IEEE Power and Energy Technology Systems Journal, vol. 2, no. 2, pp. 63–73, Aug. 2015, doi: 10.1109/jpets.2015.2427370.M. Steurer, F. Bogdan, W. Ren, M. Sloderbeck, and S. Woodruff, “Controller and power hardware-in-loop methods for accelerating renewable energy integration,” 2007. doi: 10.1109/PES.2007.386022.M. S. Almas, R. Leelaruji, and L. Vanfretti, “Over-current relay model implementation for real time simulation & Hardware-in-the-Loop (HIL) validation,” in IECON Proceedings (Industrial Electronics Conference), 2012, pp. 4789–4796. doi: 10.1109/IECON.2012.6389585.E. Perez and J. de la Ree, “Development of a real time simulator based on ATP-EMTP and sampled values of IEC61850-9-2,” International Journal of Electrical Power and Energy Systems, vol. 83, pp. 594–600, 2016, doi: 10.1016/j.ijepes.2016.06.001.H. Kirrmann, K. Weber, O. Kleineberg, and H. Weibel, “HSR: Zero recovery time and low-cost redundancy for industrial Ethernet (high availability seamless redundancy, IEC 62439-3),” ETFA 2009 - 2009 IEEE Conference on Emerging Technologies and Factory Automation, pp. 3–6, 2009, doi: 10.1109/ETFA.2009.5347037.G. Yang, S. Hao, S. Yao, and T. Zhang, “Study on SV packet transmission delay measurement of IEC 61850-9-2 process bus networks in smart substation,” in 2017 16th International Conference on Optical Communications and Networks (ICOCN), Aug. 2017, pp. 1–3. doi: 10.1109/ICOCN.2017.8121371.EstudiantesInvestigadoresMaestrosORIGINAL71331651.2021.pdf71331651.2021.pdfTesis Maestría en Ingeniería - Ingeniería Eléctricaapplication/pdf3177342https://repositorio.unal.edu.co/bitstream/unal/81623/3/71331651.2021.pdfa99912d4ce08b7d0b3c84e36df8738aeMD53LICENSElicense.txtlicense.txttext/plain; charset=utf-84074https://repositorio.unal.edu.co/bitstream/unal/81623/4/license.txt8153f7789df02f0a4c9e079953658ab2MD54THUMBNAIL71331651.2021.pdf.jpg71331651.2021.pdf.jpgGenerated Thumbnailimage/jpeg4141https://repositorio.unal.edu.co/bitstream/unal/81623/5/71331651.2021.pdf.jpgdbaab305910e52e047b5fb50d7b9cb9bMD55unal/81623oai:repositorio.unal.edu.co:unal/816232024-08-06 23:10:31.788Repositorio Institucional Universidad Nacional de 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