Model-based implementation of self-configurable intellectual property modules for image histogram calculation in FPGAs

This work presents the development of self-modifiable Intellectual Property (IP) modules for histogram calculation using the modelbased design technique provided by Xilinx System Generator. In this work, an analysis and a comparison among histogram calculation architectures are presented, selecting the best solution for the design flow used. Also, the paper emphasizes the use of generic architectures capable of been adjustable by a self configurable procedure to ensure a processing flow adequate to the application requirements. In addition, the implementation of a configurable IP module for histogram calculation using a model-based design flow is described and some implementation results are shown over a Xilinx FPGA Spartan-6 LX45.

• Autores: Garcés Socarrás, Luis Manuel; Romero Ares, Daniel Alejandro; Cabrera Sarmiento, Alejandro José; Sánchez Solano, Santiago; Brox Jiménez, Piedad
• Tipo de recurso: Article of journal
• Fecha de publicación: 2017
• Institución: Universidad Nacional de Colombia
• Repositorio: Universidad Nacional de Colombia
• Idioma: spa
• OAI Identifier: oai:repositorio.unal.edu.co:unal/67581
• Acceso en línea: https://repositorio.unal.edu.co/handle/unal/67581; http://bdigital.unal.edu.co/68610/
• Palabra clave: 62 Ingeniería y operaciones afines / Engineering; Digital image processing; histogram calculation; FPGA; xilinx system generator; MATLAB®/Simulink®; self-configuration.; Procesado Digital de imágenes; cálculo de histogramas; FPGA; sistema de generación Xilinx MATLAB®/Simulink®; configuración automática.
• Rights: openAccess
• License: Atribución-NoComercial 4.0 Internacional