New digital demodulator with matched filters and curve segmentation techniques for BFSK demodulation: Analytical description
The present article relates in general to digital demodulation of Binary Frequency Shift Keying (BFSK). The objective of the present research is to obtain a new processing method for demodulating BFSK-signals in order to reduce hardware complexity in comparison with other methods reported. The solut...
- Autores:
-
Torres Gómez, Jorge
Hernández, Fidel
Habermann, Joachim
- Tipo de recurso:
- Article of journal
- Fecha de publicación:
- 2015
- Institución:
- Universidad Nacional de Colombia
- Repositorio:
- Universidad Nacional de Colombia
- Idioma:
- spa
- OAI Identifier:
- oai:repositorio.unal.edu.co:unal/67638
- Acceso en línea:
- https://repositorio.unal.edu.co/handle/unal/67638
http://bdigital.unal.edu.co/68667/
- Palabra clave:
- 62 Ingeniería y operaciones afines / Engineering
Matched Filters
Curve Segmentation
Digital Demodulation
BFSK
FPGA
Filtros adaptados
segmentación de curvas
demodulación digital
BFSK
FPGA.
- Rights
- openAccess
- License
- Atribución-NoComercial 4.0 Internacional
Summary: | The present article relates in general to digital demodulation of Binary Frequency Shift Keying (BFSK). The objective of the present research is to obtain a new processing method for demodulating BFSK-signals in order to reduce hardware complexity in comparison with other methods reported. The solution proposed here makes use of the matched filter theory and curve segmentation algorithms. This paper describes the integration and configuration of a Sampler Correlator and curve segmentation blocks in order to obtain a digital receiver for a proper demodulation of the received signal. The proposed solution is shown to strongly reduce hardware complexity. In this part a presentation of the proposed solution regarding the analytical expressions is addressed. The paper covers in detail the elements needed for properly configuring the system. In a second part it is presented the implementation of the system for FPGA technology and the simulation results in order to validate the overall performance. |
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