Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits

This article describes the computational model of a 2nd order Σ-Δ modulator used to generate Pulse-density Modulated (PDM) signals. Such a model was required as part of a previous work carried by one of the authors in order to perform design verification of analog integrated circuits. For this purpose, the theoretical performance of the Σ-Δ modulators was studied, and the mathematical model of the latter was performed using finite difference equations under coherent sampling. After this, the modulator was implemented using Matlab™ mathematical model. Then, it was verified that it behaved according to the theory of Σ-Δ modulation by performing simulations. As this work is complementary to a previously developed one, as already mentioned, we were careful that the stimuli encoded in the PDM signals was recoverable through a low pass filtering. Therefore, such filter was implemented in Matlab™, and after that we applied the PDM signals to its input. The result was the successful recovery of the stimuli, but with remaining noise outside and within the band of interest. It was evident that filtering was not able to remove the noise completely. Although

• Tipo de recurso: Article of journal
• Fecha de publicación: 2014
• Institución: Universidad Antonio Nariño
• Repositorio: Repositorio UAN
• Idioma: spa
• OAI Identifier: oai:repositorio.uan.edu.co:123456789/10452
• Acceso en línea: https://revistas.uan.edu.co/index.php/ingeuan/article/view/383; https://repositorio.uan.edu.co/handle/123456789/10452
• Palabra clave: Modulador ∑-∆; señales PDM; modelo computacional; filtro pasa-bajas; verificación de circuitos integrados analógicos; Σ-Δ modulator; PDM signals; computational model; low pass filter; verification of analog integrated circuits
• License: https://creativecommons.org/licenses/by-nc-sa/4.0