(2014). Computer model of a Σ-Δ modulator 2nd order for generating testing signals in analog integrated circuits.
Chicago Style (17th ed.) CitationComputer Model of a Σ-Δ Modulator 2nd Order for Generating Testing Signals in Analog Integrated Circuits. 2014.
MLA (8th ed.) CitationComputer Model of a Σ-Δ Modulator 2nd Order for Generating Testing Signals in Analog Integrated Circuits. 2014.
Warning: These citations may not always be 100% accurate.