A self-adaptive hardware architecture with fault tolerance capabilities
This paper describes a Fault Tolerance System (FTS) implemented in a new self-adaptive hardware architecture. This architecture is based on an array of cells that implements in a distributed way self-adaptive capabilities. The cell includes a configurable multiprocessor, so it can have between one a...
- Autores:
-
Moreno, Juan Manuel
Soto Vargas, Javier Evandro
Cabestany, Joan
- Tipo de recurso:
- Article of investigation
- Fecha de publicación:
- 2013
- Institución:
- Escuela Colombiana de Ingeniería Julio Garavito
- Repositorio:
- Repositorio Institucional ECI
- Idioma:
- eng
- OAI Identifier:
- oai:repositorio.escuelaing.edu.co:001/2311
- Acceso en línea:
- https://repositorio.escuelaing.edu.co/handle/001/2311
https://doi.org/10.1016/j.neucom.2012.10.038
https://www.sciencedirect.com/science/article/abs/pii/S0925231213004293
- Palabra clave:
- Computación tolerante a fallos
Autoestabilización (Computadores)
Autoenrutamiento (Administración de redes de computadores)
Fault-tolerant computing
Self-stabilization (Computer science)
Self-routing (Computer network management)
Self-adaptive
Self-placement
Self-routing
Self-replication
MIMD
Dynamic fault tolerance
- Rights
- closedAccess
- License
- http://purl.org/coar/access_right/c_14cb
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| dc.title.eng.fl_str_mv |
A self-adaptive hardware architecture with fault tolerance capabilities |
| title |
A self-adaptive hardware architecture with fault tolerance capabilities |
| spellingShingle |
A self-adaptive hardware architecture with fault tolerance capabilities Computación tolerante a fallos Autoestabilización (Computadores) Autoenrutamiento (Administración de redes de computadores) Fault-tolerant computing Self-stabilization (Computer science) Self-routing (Computer network management) Self-adaptive Self-placement Self-routing Self-replication MIMD Dynamic fault tolerance |
| title_short |
A self-adaptive hardware architecture with fault tolerance capabilities |
| title_full |
A self-adaptive hardware architecture with fault tolerance capabilities |
| title_fullStr |
A self-adaptive hardware architecture with fault tolerance capabilities |
| title_full_unstemmed |
A self-adaptive hardware architecture with fault tolerance capabilities |
| title_sort |
A self-adaptive hardware architecture with fault tolerance capabilities |
| dc.creator.fl_str_mv |
Moreno, Juan Manuel Soto Vargas, Javier Evandro Cabestany, Joan |
| dc.contributor.author.none.fl_str_mv |
Moreno, Juan Manuel Soto Vargas, Javier Evandro Cabestany, Joan |
| dc.contributor.researchgroup.spa.fl_str_mv |
Grupo de Investigación Ecitrónica |
| dc.subject.armarc.spa.fl_str_mv |
Computación tolerante a fallos Autoestabilización (Computadores) Autoenrutamiento (Administración de redes de computadores) |
| topic |
Computación tolerante a fallos Autoestabilización (Computadores) Autoenrutamiento (Administración de redes de computadores) Fault-tolerant computing Self-stabilization (Computer science) Self-routing (Computer network management) Self-adaptive Self-placement Self-routing Self-replication MIMD Dynamic fault tolerance |
| dc.subject.armarc.eng.fl_str_mv |
Fault-tolerant computing Self-stabilization (Computer science) Self-routing (Computer network management) |
| dc.subject.proposal.eng.fl_str_mv |
Self-adaptive Self-placement Self-routing Self-replication MIMD Dynamic fault tolerance |
| description |
This paper describes a Fault Tolerance System (FTS) implemented in a new self-adaptive hardware architecture. This architecture is based on an array of cells that implements in a distributed way self-adaptive capabilities. The cell includes a configurable multiprocessor, so it can have between one and four processors working in parallel, with a programmable configuration mode that allows selecting the size of program and data memories. The self-elimination and self-replication capabilities of cell(s) are performed when the FTS detects a failure in any of the processors that include it, so that this cell(s) will be self-discarded for future implementations. Other adaptive capabilities of the system are self-routing, self-placement and runtime selfconfiguration. Additionally, it is described as an example application and a software tool that has been implemented to facilitate the development of applications to test the system. |
| publishDate |
2013 |
| dc.date.issued.none.fl_str_mv |
2013 |
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2023-05-09T19:55:57Z |
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2023-05-09T19:55:57Z |
| dc.type.spa.fl_str_mv |
Artículo de revista |
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http://purl.org/coar/version/c_970fb48d4fbd8a85 |
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info:eu-repo/semantics/publishedVersion |
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http://purl.org/coar/resource_type/c_2df8fbb1 |
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Text |
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0925-2312 |
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https://repositorio.escuelaing.edu.co/handle/001/2311 |
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https://doi.org/10.1016/j.neucom.2012.10.038 |
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https://www.sciencedirect.com/science/article/abs/pii/S0925231213004293 |
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0925-2312 |
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https://repositorio.escuelaing.edu.co/handle/001/2311 https://doi.org/10.1016/j.neucom.2012.10.038 https://www.sciencedirect.com/science/article/abs/pii/S0925231213004293 |
| dc.language.iso.spa.fl_str_mv |
eng |
| language |
eng |
| dc.relation.citationendpage.spa.fl_str_mv |
31 |
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25 |
| dc.relation.citationvolume.spa.fl_str_mv |
121 |
| dc.relation.indexed.spa.fl_str_mv |
N/A |
| dc.relation.ispartofjournal.eng.fl_str_mv |
Neurocomputing |
| dc.relation.references.spa.fl_str_mv |
AETHER Project Home, URL: ⟨http://www.aether-ist.org⟩ J. Soto, J. Moreno, J. Madrenas, J. Cabestany, Implementation of a dynamic faulttolerance scaling technique on a self-adaptive hardware architecture, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs, 2009, pp. 445–450. T. Streichert, D. Koch, C. Haubelt, J. Teich, Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems, Hindawi Publishing Corp, New York, 2006. Z. Chen, M. Yang, G. Francia, J. Dongarra, Self adaptive application level fault tolerance for parallel and distributed computing, in: IEEE International Parallel and Distributed Processing Symposium, 2007. IPDPS 2007, pp. 1–8. N. Macias, L. Durbeck, Self-Assembling circuits with autonomous fault handling, in: Proceedings of the 2002 NASA/DoD Conference on Evolvable Hardware (EH'02), IEEE Computer Society Press, 2002, pp. 46–55. J. Moreno, Y. Thoma, E. Sanchez, POEtic: a prototyping platform for bio-inspired hardware, in: Proceedings of the 6th International Conference on Evolvable Systems (ICES), pp. 180–182. J. Moreno, E. Sanchez, J. Cabestany, An in-system routing strategy for evolvable hardware programmable platforms, in: Proceedings of the Third NASA/DoD Workshop on Evolvable Hardware, IEEE Computer Society Press, 2001. pp. 157–166. T. Vu, C. Jesshope, Formalizing SANE virtual processor in thread algebra, in: ICFEM'07: Proceedings of the Formal Engineering Methods, 9th International Conference on Formal methods and Software Engineering, Springer-Verlag, Boca Raton, FL, USA, 2007, pp. 345–365. J. Soto, J.M. Moreno, J. Madrenas, J. Cabestany Communication infrastructure for a self-Adaptive hardware architecture, in: Proceedings of the Reconfigurable Communication-centric Systems-on-Chip workshop (ReCoSoC 08), Barcelona, Spain, July 9–11, 2008, pp. 175–180, ISBN: 978-84-691-3603-4. |
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7 páginas |
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Moreno, Juan Manueladdac955f7bd563e343291cb51f7a128600Soto Vargas, Javier Evandro89c3f0d0d7d4dce81c10ac82b757ef50600Cabestany, Joan7645663e1e72640f9c333251c04fcf29600Grupo de Investigación Ecitrónica2023-05-09T19:55:57Z2023-05-09T19:55:57Z20130925-2312https://repositorio.escuelaing.edu.co/handle/001/2311https://doi.org/10.1016/j.neucom.2012.10.038https://www.sciencedirect.com/science/article/abs/pii/S0925231213004293This paper describes a Fault Tolerance System (FTS) implemented in a new self-adaptive hardware architecture. This architecture is based on an array of cells that implements in a distributed way self-adaptive capabilities. The cell includes a configurable multiprocessor, so it can have between one and four processors working in parallel, with a programmable configuration mode that allows selecting the size of program and data memories. The self-elimination and self-replication capabilities of cell(s) are performed when the FTS detects a failure in any of the processors that include it, so that this cell(s) will be self-discarded for future implementations. Other adaptive capabilities of the system are self-routing, self-placement and runtime selfconfiguration. Additionally, it is described as an example application and a software tool that has been implemented to facilitate the development of applications to test the system.Este artículo describe un sistema de tolerancia a fallos (FTS) implementado en una nueva arquitectura de hardware autoadaptativa. Esta arquitectura se basa en una matriz de células que implementa de forma distribuida capacidades autoadaptativas. La célula incluye un multiprocesador configurable, por lo que puede tener entre uno y cuatro procesadores trabajando en paralelo, con un modo de configuración programable que permite seleccionar el tamaño de las memorias de programa y datos. Las capacidades de autoeliminación y autorreplicación de la(s) célula(s) se llevan a cabo cuando el FTS detecta un fallo en alguno de los procesadores que la(s) incluye, de forma que esta(s) célula(s) se autodescarta(n) para futuras implementaciones. Otras capacidades adaptativas del sistema son el autoenrutamiento, la autocolocación y la autoconfiguración en tiempo de ejecución. Además, se describe una aplicación de ejemplo y una herramienta de software que se ha implementado para facilitar el desarrollo de aplicaciones para probar el sistema.7 páginasapplication/pdfengElSevierhttps://www.sciencedirect.com/science/article/abs/pii/S0925231213004293A self-adaptive hardware architecture with fault tolerance capabilitiesArtículo de revistainfo:eu-repo/semantics/publishedVersionhttp://purl.org/coar/resource_type/c_2df8fbb1Textinfo:eu-repo/semantics/articlehttp://purl.org/redcol/resource_type/ARThttp://purl.org/coar/version/c_970fb48d4fbd8a853125121N/ANeurocomputingAETHER Project Home, URL: ⟨http://www.aether-ist.org⟩J. Soto, J. Moreno, J. Madrenas, J. Cabestany, Implementation of a dynamic faulttolerance scaling technique on a self-adaptive hardware architecture, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs, 2009, pp. 445–450.T. Streichert, D. Koch, C. Haubelt, J. Teich, Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems, Hindawi Publishing Corp, New York, 2006.Z. Chen, M. Yang, G. Francia, J. Dongarra, Self adaptive application level fault tolerance for parallel and distributed computing, in: IEEE International Parallel and Distributed Processing Symposium, 2007. IPDPS 2007, pp. 1–8.N. Macias, L. Durbeck, Self-Assembling circuits with autonomous fault handling, in: Proceedings of the 2002 NASA/DoD Conference on Evolvable Hardware (EH'02), IEEE Computer Society Press, 2002, pp. 46–55.J. Moreno, Y. Thoma, E. Sanchez, POEtic: a prototyping platform for bio-inspired hardware, in: Proceedings of the 6th International Conference on Evolvable Systems (ICES), pp. 180–182.J. Moreno, E. Sanchez, J. Cabestany, An in-system routing strategy for evolvable hardware programmable platforms, in: Proceedings of the Third NASA/DoD Workshop on Evolvable Hardware, IEEE Computer Society Press, 2001. pp. 157–166.T. Vu, C. Jesshope, Formalizing SANE virtual processor in thread algebra, in: ICFEM'07: Proceedings of the Formal Engineering Methods, 9th International Conference on Formal methods and Software Engineering, Springer-Verlag, Boca Raton, FL, USA, 2007, pp. 345–365.J. Soto, J.M. Moreno, J. Madrenas, J. Cabestany Communication infrastructure for a self-Adaptive hardware architecture, in: Proceedings of the Reconfigurable Communication-centric Systems-on-Chip workshop (ReCoSoC 08), Barcelona, Spain, July 9–11, 2008, pp. 175–180, ISBN: 978-84-691-3603-4.info:eu-repo/semantics/closedAccesshttp://purl.org/coar/access_right/c_14cbComputación tolerante a fallosAutoestabilización (Computadores)Autoenrutamiento (Administración de redes de computadores)Fault-tolerant computingSelf-stabilization (Computer science)Self-routing (Computer network management)Self-adaptiveSelf-placementSelf-routingSelf-replicationMIMDDynamic fault toleranceTHUMBNAILA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdf.jpgA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdf.jpgGenerated Thumbnailimage/jpeg15845https://repositorio.escuelaing.edu.co/bitstream/001/2311/4/A%20Self-Adaptive%20Hardware%20Architecture%20with%20Fault%20Tolerance%20Capabilities.pdf.jpg70de5892f384a0292405de4704a093e3MD54metadata only accessTEXTA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdf.txtA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdf.txtExtracted texttext/plain35721https://repositorio.escuelaing.edu.co/bitstream/001/2311/3/A%20Self-Adaptive%20Hardware%20Architecture%20with%20Fault%20Tolerance%20Capabilities.pdf.txta703ece756336a17d62c0cb847d2f970MD53metadata only accessLICENSElicense.txtlicense.txttext/plain; charset=utf-81881https://repositorio.escuelaing.edu.co/bitstream/001/2311/2/license.txt5a7ca94c2e5326ee169f979d71d0f06eMD52open accessORIGINALA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdfA Self-Adaptive Hardware Architecture with Fault Tolerance Capabilities.pdfArtículo de revistaapplication/pdf2830306https://repositorio.escuelaing.edu.co/bitstream/001/2311/1/A%20Self-Adaptive%20Hardware%20Architecture%20with%20Fault%20Tolerance%20Capabilities.pdf59696840e4d149ab9bc42d261b78c18eMD51metadata only access001/2311oai:repositorio.escuelaing.edu.co:001/23112023-09-11 11:21:44.418metadata only accessRepositorio Escuela Colombiana de Ingeniería Julio Garavitorepositorio.eci@escuelaing.edu.coU0kgVVNURUQgSEFDRSBQQVJURSBERUwgR1JVUE8gREUgUEFSRVMgRVZBTFVBRE9SRVMgREUgTEEgQ09MRUNDScOTTiAiUEVFUiBSRVZJRVciLCBPTUlUQSBFU1RBIExJQ0VOQ0lBLgoKQXV0b3Jpem8gYSBsYSBFc2N1ZWxhIENvbG9tYmlhbmEgZGUgSW5nZW5pZXLDrWEgSnVsaW8gR2FyYXZpdG8gcGFyYSBwdWJsaWNhciBlbCB0cmFiYWpvIGRlIGdyYWRvLCBhcnTDrWN1bG8sIHZpZGVvLCAKY29uZmVyZW5jaWEsIGxpYnJvLCBpbWFnZW4sIGZvdG9ncmFmw61hLCBhdWRpbywgcHJlc2VudGFjacOzbiB1IG90cm8gKGVuICAgIGFkZWxhbnRlIGRvY3VtZW50bykgcXVlIGVuIGxhIGZlY2hhIAplbnRyZWdvIGVuIGZvcm1hdG8gZGlnaXRhbCwgeSBsZSBwZXJtaXRvIGRlIGZvcm1hIGluZGVmaW5pZGEgcXVlIGxvIHB1YmxpcXVlIGVuIGVsIHJlcG9zaXRvcmlvIGluc3RpdHVjaW9uYWwsIAplbiBsb3MgdMOpcm1pbm9zIGVzdGFibGVjaWRvcyBlbiBsYSBMZXkgMjMgZGUgMTk4MiwgbGEgTGV5IDQ0IGRlIDE5OTMsIHkgZGVtw6FzIGxleWVzIHkganVyaXNwcnVkZW5jaWEgdmlnZW50ZQphbCByZXNwZWN0bywgcGFyYSBmaW5lcyBlZHVjYXRpdm9zIHkgbm8gbHVjcmF0aXZvcy4gRXN0YSBhdXRvcml6YWNpw7NuIGVzIHbDoWxpZGEgcGFyYSBsYXMgZmFjdWx0YWRlcyB5IGRlcmVjaG9zIGRlIAp1c28gc29icmUgbGEgb2JyYSBlbiBmb3JtYXRvIGRpZ2l0YWwsIGVsZWN0csOzbmljbywgdmlydHVhbDsgeSBwYXJhIHVzb3MgZW4gcmVkZXMsIGludGVybmV0LCBleHRyYW5ldCwgeSBjdWFscXVpZXIgCmZvcm1hdG8gbyBtZWRpbyBjb25vY2lkbyBvIHBvciBjb25vY2VyLgpFbiBtaSBjYWxpZGFkIGRlIGF1dG9yLCBleHByZXNvIHF1ZSBlbCBkb2N1bWVudG8gb2JqZXRvIGRlIGxhIHByZXNlbnRlIGF1dG9yaXphY2nDs24gZXMgb3JpZ2luYWwgeSBsbyBlbGFib3LDqSBzaW4gCnF1ZWJyYW50YXIgbmkgc3VwbGFudGFyIGxvcyBkZXJlY2hvcyBkZSBhdXRvciBkZSB0ZXJjZXJvcy4gUG9yIGxvIHRhbnRvLCBlcyBkZSBtaSBleGNsdXNpdmEgYXV0b3LDrWEgeSwgZW4gY29uc2VjdWVuY2lhLCAKdGVuZ28gbGEgdGl0dWxhcmlkYWQgc29icmUgw6lsLiBFbiBjYXNvIGRlIHF1ZWphIG8gYWNjacOzbiBwb3IgcGFydGUgZGUgdW4gdGVyY2VybyByZWZlcmVudGUgYSBsb3MgZGVyZWNob3MgZGUgYXV0b3Igc29icmUgCmVsIGRvY3VtZW50byBlbiBjdWVzdGnDs24sIGFzdW1pcsOpIGxhIHJlc3BvbnNhYmlsaWRhZCB0b3RhbCB5IHNhbGRyw6kgZW4gZGVmZW5zYSBkZSBsb3MgZGVyZWNob3MgYXF1w60gYXV0b3JpemFkb3MuIEVzdG8gCnNpZ25pZmljYSBxdWUsIHBhcmEgdG9kb3MgbG9zIGVmZWN0b3MsIGxhIEVzY3VlbGEgYWN0w7phIGNvbW8gdW4gdGVyY2VybyBkZSBidWVuYSBmZS4KVG9kYSBwZXJzb25hIHF1ZSBjb25zdWx0ZSBlbCBSZXBvc2l0b3JpbyBJbnN0aXR1Y2lvbmFsIGRlIGxhIEVzY3VlbGEsIGVsIENhdMOhbG9nbyBlbiBsw61uZWEgdSBvdHJvIG1lZGlvIGVsZWN0csOzbmljbywgCnBvZHLDoSBjb3BpYXIgYXBhcnRlcyBkZWwgdGV4dG8sIGNvbiBlbCBjb21wcm9taXNvIGRlIGNpdGFyIHNpZW1wcmUgbGEgZnVlbnRlLCBsYSBjdWFsIGluY2x1eWUgZWwgdMOtdHVsbyBkZWwgdHJhYmFqbyB5IGVsIAphdXRvci5Fc3RhIGF1dG9yaXphY2nDs24gbm8gaW1wbGljYSByZW51bmNpYSBhIGxhIGZhY3VsdGFkIHF1ZSB0ZW5nbyBkZSBwdWJsaWNhciB0b3RhbCBvIHBhcmNpYWxtZW50ZSBsYSBvYnJhIGVuIG90cm9zIAptZWRpb3MuRXN0YSBhdXRvcml6YWNpw7NuIGVzdMOhIHJlc3BhbGRhZGEgcG9yIGxhcyBmaXJtYXMgZGVsIChsb3MpIGF1dG9yKGVzKSBkZWwgZG9jdW1lbnRvLiAKU8OtIGF1dG9yaXpvIChhbWJvcykK |